preliminary datasheet LP2202 LP2202 C ver. 1.0 datasheet dec.-2006 page 1 of 8 250ma,dual channel ultra-fast cmos ldo regulator general description the LP2202 is a dual channel, low noise, and low dropout regulator sourcing up to 250ma at each channel. the range of output voltage is from 1.2v to 3.6v by operating from 2.5v to 5.5v input. LP2202 offers 2% accuracy, extremely low dropout voltage (220mv @ 250ma), and extremely low ground current, only 25a per ldo. the shutdown current is near zero current which is suitable for battery-power devices. other features include current limiting, over temperature, output short circuit protection. LP2202 is short circuit thermal folded back protected. LP2202 lowers its otp trip point from 165c to 110c when output short circuit occurs (vout < 0.4v) providing maximum safety to end users. LP2202 can operate stably with very small ceramic output capacitors, reducing required board space and component cost. LP2202 is available in fixed output voltages in the sot-23-6 package. ordering information LP2202 - f: pb-free package type b6: sot23-6 out1/out2 voltage type 18/28: 1.8v/2.8v 25/28: 2.5v/2.8v 28/28: 2.8v/2.8v typical application circuit 1uf LP2202 chip enable vin vout2 1uf 4 1 2 6 5 3 en1 vout2 gnd vout1 vin en2 vout1 1uf features wide operating voltage ranges : 2.5v to 5.5v ? low-noise for rf application high psrr 70db at 1khz no noise bypass capacitor required ? fast response in line/load transient ttl-logic-controlled shutdown input dual ldo outputs (300ma/300ma) high output accuracy 2% ultra-low quiescent current 27ua thermal shutdown protection thermal shutdown protection tiny sot-23-6 and 8-lead dfn package rohs compliant and 100% lead (pb)-free applications cdma/gsm cellul ar handsets smart mobile phone battery-powered equipment dsc sensor wireless card pin configurations marking information please see website. sot23-6 (top view)
preliminary datasheet LP2202 LP2202 C ver. 1.0 datasheet dec.-2006 page 2 of 8 functional pin description pin no. pin name pin function 1 vout2 channel 2 output voltage 2 gnd common ground 3 en2 chip enable2 (active high) 4 en1 chip enable1 (active high) 5 vin supply input 6 vout1 channel 1 output voltage function block diagram
preliminary datasheet LP2202 LP2202 C ver. 1.0 datasheet dec.-2006 page 3 of 8 absolute maximum ratings supply input voltage------------------------------------------- -----------------------------------------------------------6v power dissipation, pd @ ta = 25 c sot23-6 ----------------------------------------------------------------------------------------------------455mw package thermal resistance sot23-6, ja -------------------------------------------------- --------------------------------------------------------220c/w lead temperature (soldering, 10 sec.) ------------------------- ----------------------------------------------------260c storage temperature range ------------------------------------- ---------------------------------------- ?65c to 150c esd susceptibility hbm (human body mode) ----------------------------------------- --------------------------------------------------2kv mm(machine-mode)----------------------------------------------- ------------------------------------------------------200v recommended operating conditions operation junction temperature range -------------------------- ---------------------------------?40c to 125c operation ambient temperaturerange----------------------------- ----------------------------------?40c to 85c electrical characteristics (vin = vout + 1v, cin = cout = 1f, ta = 25 c, unless otherwis e specified) parameter symbol test conditions min typ max units output voltage accuracy vout iout = 1ma ?2 -- +2 % current limit ilim rload = 1? 360 450 700 ma quiescent current iq ven 1.2v, iout = 0ma 75 110 a dropout voltage vdrop iout = 200ma, vout > 2.8v 170 200 mv iout = 250ma, vout > 2.8v 220 300 line regulation vline vin = (vout + 1v) to 5.5v, iout = 1ma 0.3 % load regulation load 1ma < iout < 300ma 0.6 % standby current istby ven = gnd, shutdown 0.01 1 a en input bias current iibsd ven = gnd or vin 0 100 na en threshold logic-low voltage vil vin = 3v to 5.5v, shutdown 0.4 v logic-high voltage vih vin = 3v to 5.5v, start-up 1.2 output noise voltage 10hz to 100khz, iout = 200ma cout = 1f 100 uvrms power supply f = 100hz psrr ?75 db rejection rate f = 10khz cout = 1f, iout = 10ma ?65 thermal shutdown temperature tsd 165 c
preliminary datasheet LP2202 LP2202 C ver. 1.0 datasheet dec.-2006 page 4 of 8 typical operating characteristics
preliminary datasheet LP2202 LP2202 C ver. 1.0 datasheet dec.-2006 page 5 of 8
preliminary datasheet LP2202 LP2202 C ver. 1.0 datasheet dec.- 2006 page 6 of 8 applications information l ike any low-dropout regulator, the external capacitors used with the LP2202 must be carefully selected for regulator stability and performance. using a capacitor whose value is > 1f on the LP2202 input and the amount of capacitance can be increased without limit. the input capacitor must be located a distance of not more than 0.5 inch from the input pin of the ic and returned to a clean analog ground. any good quality ceramic or tantalum can be used for this capacitor. the capacitor with larger value and lower esr (equivalent series resistance) provides better psrr and line-transient response. the output capacitor must meet both requirements for minimum amount of capacitance and esr in all ldos application. the LP2202 is designed specifically to work with low esr ceramic output capacitor in space-saving and performance consideration. using a ceramic capacitor whose value is at least 1f with esr is > 25m? on the LP2202 output ensures stability. the LP2202 still work s well with output capacitor of other types due to the wide stable esr range. figure 1 shows the curves of allowable esr range as a function of load current for various output capacitor values. output capacitor of larger capacitance can reduce noise and improve load transient response, stability, and psrr. the output capacitor should be located not more than 0.5 inch from the vout pin of the LP2202 and returned to a clean analog ground. start-up function enable function the LP2202 features an ldo regulator enable/disable function. to assure the ldo re gulator will switch on, the en turn on control level must be greater than 1.2 volts. the ldo regulator will go into the shutdown mode when the voltage on the en pin falls below 0.4 volts. for to protecting the system, the LP2202 have a quick-discharge function. if the enable function is not needed in a specific application, it may be tied to vin to keep the ldo regulator in a continuously on state. thermal considerations thermal protection limits power dissipation in LP2202. when the operation junction temperature exceeds 165c, the otp circuit starts the thermal shutdown function turn the pass element off. the pass element turn on again after the junction temperature cools by 30c. for continue operation, do not exceed absolute maximum operation junction temperature 125c. the power dissipation definition in device is : pd = (vin?vout) x iout + vin x iq the maximum power dissipation depends on the thermal resistance of ic package, pcb layout, the rate of surroundings airflow and temperature difference between junction to ambient. the maximum power dissipation can be calculated by following formula : pd(max) = ( tj(ma x) ? ta ) /ja where tj(max) is the maximum operation junction
preliminary datasheet LP2202 LP2202 C ver. 1.0 datasheet dec.- 2006 page 7 of 8 temperature 125c, ta is the ambient temperature and the ja is the junction to ambient thermal resistance. for recommended operating conditions specification of LP2202, where tj(max) is the maximum junction temperature of the die (125c) and ta is the maximum ambient temperature. the junction to ambient thermal resistance (ja is layout dependent) for sot23-6 package is 250c/w. pd(max) = (125c?25c) / 250 = 400mw (sot23-6) pd(max) = (125c?25c) / 165 = 606mw the maximum power dissipation depends on operating ambient temperature for fixed tj(max) and thermal resistance ja.
preliminary datasheet LP2202 LP2202 C ver. 1.0 datasheet dec.-2006 page 8 of 8 packaging information
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